The geometries of microelectronic features continue to scale to smaller sizes and increase in complexity. Accordingly, the patterning techniques used to manufacture microelectronic devices may need to become more precise to create smaller features and minimize damage to the films during manufacturing. Previously, selective etching or high precision etching has been attempted by alternating between precursor deposition (passivation) and etching using plasma processing. However, these conventional approaches have been plagued by aspect ratio, profile variation, and cycle time issues. Accordingly, new high precision etching techniques that may overcome the aforementioned issues may be desirable.